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Not Recommended for New Designs - Replaced by VTM48Ex480y006A00
Application Note
V048F480T006
Parallel Operation
In applications requiring higher current or redundancy, VTM current
multipliers can be operated in parallel without adding control circuitry
or signal lines. To maximize current sharing accuracy, it is imperative
that the source and load impedance on each VTM module in a parallel
array be equal. If the modules are being fed by an upstream PRM ?
regulator, the VC nodes of all VTM modules must be connected to the
PRM module VC.
To achieve matched impedances, dedicated power planes within the PC
Input Impedance Recommendations
To take full advantage of the current multiplier’s capabilities, the
impedance of the source (input source plus the PC board impedance)
must be low over a range from DC to 5 MHz. Input bypass capacitance
may be added to improve transient performance or compensate for
high source impedance. The VTM module has extremely wide
bandwidth so the source response to transients is usually the limiting
factor in overall output response of the module.
Anomalies in the response of the source will appear at the output of
board should be used for the output and output return paths to the
the VTM module, multiplied by its K factor of 1
. The DC resistance
array of paralleled VTMs. This technique is preferable to using traces of
varying size and length.
The VTM module power train and control architecture allow
bi-directional power transfer when the module is operating within its
specified ranges. Bi-directional power processing improves transient
response in the event of an output load dump. The module may
operate in reverse, returning output power back to the input source. It
does so efficiently.
Thermal Considerations
VI Chip ? products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with the
input /output conditions, thermal management and environmental
conditions. Maintaining the top of the V048F480T006 case to less than
100°C will keep all junctions within the VI Chip module below
125°C for most applications. The percent of total heat dissipated
through the top surface versus through the J-lead is entirely dependent
on the particular mechanical and thermal environment. The heat
dissipated through the top surface is typically 60%. The heat dissipated
through the J-lead onto the PCB board surface is typically 40%. Use
100% top surface dissipation when designing for a conservative
cooling solution.
It is not recommended to use a VI Chip module for an extended period
of time at full load without proper heat sinking.
Input reflected ripple
measurement point
F1
of the source should be kept as low as possible to minimize voltage
deviations on the input to the module. If the module is going to be
operating close to the high limit of its input range, make sure input
voltage deviations will not trigger the input overvoltage turn-off
threshold.
Input Fuse Recommendations
VI Chip products are not internally fused in order to provide flexibility in
configuring power systems. However, input line fusing of VI Chip
modules must always be incorporated within the power system. A fast
acting fuse is required to meet safety agency Conditions of
Acceptability. The input line fuse should be placed in series with
the +In port.
10A
Fuse
+In
+Out
-Out
R3
5 m Ω
+
Ro
C1
47 μF
Al electrolytic
C2
0.47 μF
ceramic
14 V +–
TM
VC
PC
-In
VTM ?
+Out
K
-Out
C3
9.4 μF
Load
–
Notes:
C3 should be placed close
to the load
R3 may be ESR of C3 or a
separate damping resistor.
Figure 15 — VTM module test circuit
VTM ? Current Multiplier
Page 9 of 11
Rev 3.1
01/2014
vicorpower.com
800 927.9474
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